{
  "schema_version": "0.6.0",
  "paper_id": "execution-trace-model-verification-multicore",
  "page_url": "https://naser.github.io/research-publications/papers/execution-trace-model-verification-multicore/",
  "title": "Execution trace-based model verification to analyze multicore and real-time systems",
  "title_variants": [],
  "authors": [
    "Raphaël Beamonte",
    "Naser Ezzati-Jivan",
    "Michel R. Dagenais"
  ],
  "author_details": [
    {
      "name": "Raphaël Beamonte",
      "orcid": "https://orcid.org/0000-0002-3078-0947",
      "profile_url": "https://dblp.org/pid/181/3722.html"
    },
    {
      "name": "Naser Ezzati-Jivan",
      "orcid": "https://orcid.org/0000-0003-1435-6297",
      "profile_url": "https://naser.github.io/"
    },
    {
      "name": "Michel R. Dagenais",
      "orcid": null,
      "profile_url": "https://dblp.org/pid/60/309.html"
    }
  ],
  "publication": {
    "year": 2022,
    "venue": "Concurrency and Computation: Practice and Experience",
    "type": "journal article",
    "publication_date": "2022-05-04",
    "online_date": "2022-05-04",
    "print_date": "2022-08",
    "volume": "34",
    "issue": "17",
    "pages": null,
    "article_number": "e6974",
    "publisher": "Wiley",
    "issn": [
      "1532-0626",
      "1532-0634"
    ],
    "isbn": [],
    "crossref_type": "journal-article"
  },
  "publication_type": "research paper",
  "status": "published_metadata_record",
  "canonical_source_url": "https://doi.org/10.1002/cpe.6974",
  "source_record_id": "execution-trace-based-model-verification-to-analyze-multicore-and-real-time-systems-321a47c8fd",
  "identifiers": {
    "doi": "10.1002/cpe.6974"
  },
  "abstract": null,
  "abstract_source": "Wiley publisher full text rendered in the signed-in ResearchGate viewer on 2026-08-06; abstract not reproduced because reuse permission for the publisher version was not established.",
  "abstract_available": false,
  "scholar_eligibility": {
    "eligible": false,
    "basis": "not-eligible",
    "note": "The page is a discovery record; it does not claim Google Scholar article-host eligibility."
  },
  "description": "The paper combines model-based quantitative constraints with user-space and kernel execution traces to automatically identify likely causes of real-time and multicore constraint violations.",
  "evidence_level": "metadata-or-abstract-reviewed",
  "evidence": {
    "source_basis": "metadata-only",
    "coverage": "bibliographic metadata",
    "summary_origin": "AI-assisted catalog editorial summary",
    "review_status": "catalog-reviewed; paper-author approval pending",
    "verified_on": "2026-08-09",
    "sources": [
      {
        "note": "DBLP/DOI bibliographic record for 10.1002/cpe.6974"
      },
      {
        "note": "author identity matched to Naser Ezzati-Jivan in the local research catalog"
      },
      {
        "note": "Publisher full text viewer pp. 1-3: problem, LTTng/LTTng-UST selection, CTF/common-clock rationale, and related tracing/model-analysis tools"
      },
      {
        "note": "Publisher full text viewer pp. 4-13: state-machine model, constraint statuses, 95%/5% sampling, reservoir sampling, interval-set extraction, distance/weight/differential analysis, and responsibility scores"
      },
      {
        "note": "Publisher full text viewer pp. 13-20: JACK2, wakelock, userspace, and cyclictest case studies, including 96.65%/96.51% JACK2 attribution and the Jetson/HDMI cyclictest diagnosis"
      },
      {
        "note": "Publisher full text viewer pp. 20-24: i7-4790/32 GiB platform, trace sizes, 100-run sampling comparison, analysis timings, and scalability"
      },
      {
        "note": "Publisher full text viewer p. 25: conclusion, data-availability statement, and future direction"
      },
      {
        "note": "No local PDF hash is claimed: the Wiley PDF link redirected to an abstract/access page and the ResearchGate publisher viewer exposed the full 26-page text but did not provide a downloadable file in this run."
      }
    ]
  },
  "summary": {
    "core_contribution": "The paper combines model-based quantitative constraints with user-space and kernel execution traces to automatically identify likely causes of real-time and multicore constraint violations.",
    "problem": "Large execution traces can reveal timing and scheduling failures, but interpreting millions of events is slow and requires deep operating-system knowledge. Model checking can identify a violated specification without explaining whether preemption, blocking, a system call, scheduling, or application code caused it.",
    "method": "A developer-specified state-machine model contains states, transitions, metric variables, and quantitative constraints. The method extracts model instances from user-space and kernel traces, labels constraint occurrences valid/invalid/uncertain, excludes uncertain cases, and compares sampled valid and invalid instances. It uses 95% confidence, a 5% margin of error, and reservoir sampling. Elements such as RUNNING, BLOCKED, PREEMPTED, and SYSCALL are converted into duration sets and merged into interval sets; directional edit-distance-like comparisons, occurrence/distance weights, differential interval sets, and responsibility scores identify the most likely causes. Follow-up analyses include process state, critical path, priority inheritance, state-machine state, CPU-top, and CPU-frequency analysis. LTTng/LTTng-UST is selected as the primary low-impact kernel/user-space tracing stack, with CTF events and a common clock; the cyclictest case uses LTTng snapshot mode.",
    "findings": "Four case studies diagnose low-priority JACK2, in-kernel wake-lock priority inversion, bad user-space code, and a preempted cyclictest waker. JACK2 analysis attributes 96.65% of excess time to WAKING and 96.51% to process preemption, identifying the higher-priority cpuburn process. The wakelock analysis identifies abnormal blocking on open, priority inheritance, and preemption by highprio1. The user-space case locates the excess time in step3. The cyclictest case on an NVIDIA Jetson TK1 traces a 7-ms outlier through rt_sigtimedwait, preempted ktimersoftd/3, and the irq/154-hpd HDMI hot-plug handler. The four traces contain 321/419,164, 42/194,997, 29/89,840, and 41,677/208,489 UST/kernel events. On an Intel Core i7-4790 at 3.6 GHz with 32 GiB DDR3, sampling preserves the highest responsibility within 0.1% in 100-run comparisons while reducing process-state analysis from 23,925.75 to 15,311.02 ms for JACK2 and from 103,119.10 to 7,124.76 ms for cyclictest.",
    "limitations": "The method depends on a developer-provided model and suitable tracepoints, and generated or selected valid baselines may not cover complex or changing behavior. Sampling is an approximation, missing snapshot data can cause instances to be dropped, and full analysis remains sensitive to the number of trace events, model instances, and variable changes. The evaluation uses four controlled/common real-time cases rather than a broad cross-platform workload study.",
    "future_work": "The paper proposes automatically setting constraint values from traces. It does not establish online learning, modern OpenTelemetry support, or automatic model generation for this publication. Supporting data are available from the corresponding author upon reasonable request."
  },
  "tags": [
    "system-tracing",
    "kernel-tracing",
    "multicore-systems",
    "trace-analysis",
    "root-cause-analysis",
    "lttng"
  ],
  "keywords": [
    "model-based constraints",
    "execution tracing",
    "user-space traces",
    "kernel traces",
    "LTTng",
    "LTTng-UST",
    "Common Trace Format",
    "Trace Compass",
    "reservoir sampling",
    "critical-path analysis",
    "JACK2",
    "cyclictest",
    "priority inversion",
    "CPUTop"
  ],
  "versions": [
    {
      "id": "published-version",
      "label": "Published version",
      "relation": "version-of-record",
      "title": "Execution trace-based model verification to analyze multicore and real-time systems",
      "url": "https://doi.org/10.1002/cpe.6974",
      "pdf_url": null,
      "status": "published",
      "canonical_for_citation": true
    }
  ],
  "access": {
    "status": "published_metadata_record",
    "note": "The DOI is the canonical citation target; this catalog does not redistribute the publisher PDF.",
    "license": null
  },
  "resources": {
    "code": null,
    "data": null,
    "slides": null,
    "demo": null
  },
  "citation_guidance": {
    "when_to_cite": "Cite this paper when using model-based quantitative constraints and user-space/kernel traces to diagnose real-time or multicore execution problems.",
    "points": [
      "LTTng/LTTng-UST and CTF-based correlation of kernel and user-space execution evidence.",
      "Reservoir-sampled valid/invalid model instances, interval-set comparison, and responsibility scoring for likely causes.",
      "JACK2, wake-lock priority inversion, bad user-space code, and cyclictest case studies with trace-size, runtime, and sampling results."
    ],
    "canonical_version_id": "published-version"
  },
  "provenance": {
    "metadata_verified_on": "2026-08-09",
    "metadata_source": [
      "DBLP/DOI bibliographic record for 10.1002/cpe.6974",
      "author identity matched to Naser Ezzati-Jivan in the local research catalog",
      "Publisher full text viewer pp. 1-3: problem, LTTng/LTTng-UST selection, CTF/common-clock rationale, and related tracing/model-analysis tools",
      "Publisher full text viewer pp. 4-13: state-machine model, constraint statuses, 95%/5% sampling, reservoir sampling, interval-set extraction, distance/weight/differential analysis, and responsibility scores",
      "Publisher full text viewer pp. 13-20: JACK2, wakelock, userspace, and cyclictest case studies, including 96.65%/96.51% JACK2 attribution and the Jetson/HDMI cyclictest diagnosis",
      "Publisher full text viewer pp. 20-24: i7-4790/32 GiB platform, trace sizes, 100-run sampling comparison, analysis timings, and scalability",
      "Publisher full text viewer p. 25: conclusion, data-availability statement, and future direction",
      "No local PDF hash is claimed: the Wiley PDF link redirected to an abstract/access page and the ResearchGate publisher viewer exposed the full 26-page text but did not provide a downloadable file in this run."
    ],
    "summary_written_by": "AI-assisted",
    "summary_verified_by": "metadata/abstract-grounded catalog review; full-text review and author approval pending",
    "linked_preprint_record": null,
    "author_order_note": null
  },
  "batch": {
    "phase": 2,
    "batch_label": "expanded forty-paper release",
    "status": "included_in_expanded_catalog",
    "selected_at": "2026-08-09"
  }
}